(1) Field of the Invention
The present invention relates to a method of fabricating a semiconductor device, and more particularly to a method of fabricating a semiconductor device using a half-tone phase shift mask.
(2) Description of the Related Art
With advancement in semiconductor fabrication techniques, semiconductor elements are being more highly integrated and miniaturized. In recent years, a half-tone phase shift method developed for the expansion of process margins is becoming a leading technique in the related field. The half-tone phase shift method is a lithography method using mask patterns that are formed by a semitransparent film having a light transmittivity of 1-16% and an optical phase difference of within 180.+-.10.degree. with respect to an optically transmitting portion. With this method, a sharp image intensity (shifter edge effect) is produced at an edge portion due to an optical phase inversion effect that develops at the mask pattern edge portion, thus enabling to enhance the resolution. However, when the half-tone phase shift method is used, since the semitransparent film having a light transmittivity of 1-16% is used as a mask, there has been a problem that film thinning occurs in the resist film of the patterns. According to a method proposed in Japanese Patent Application Kokai Publication No. Hei 5-197160, it is attempted to overcome the above problem by hardening the surface of the photoresist film.
When a mask pattern is transferred onto a photoresist film on a wafer using a step-and-repeat lithographic system, a region irradiated by one exposure (shot) is set so as to cover at least one chip region, and a repeat margin of a predetermined dimension is provided therein so that there occurs no gap between shots caused by misalignment between individual steps. As shown in FIG. 1, for example, the edge of a shot A comes on a scribe region which defines chip regions on the wafer, but this edge extends outwardly by the extent of the repeat margin 102 (for example, 2 .mu.m) from the center lines 101-1, 101-2 of the scribe region.
Thus, when the exposure of the entire wafer surface has been completed, there are overlapped portions of a plurality of shots (hereinafter referred to as overlap exposure portions). In relation to the overlap exposure portions, there are problems in the case of a half-tone phase shift method, which are explained below.
The half-tone phase shift mask is often used in the formation of a contact hole. As shown in FIG. 2A, for providing a contact hole to an insulating film 2 on a silicon substrate 1, a photoresist film 3 is formed, and a hole 4 for the formation of the contact hole is provided in a chip region I by a step exposure and development using the half-tone phase shift mask. The numeral III represents the center line position of the scribe region. In this case, a hole 5 is often unavoidably formed also at a four-fold exposure portion (103 in FIG. 1). This is because the exposure is made four times by the light transmitted through the semitransparent film of the half-tone phase shift mask. Using current techniques, it is not possible to sufficiently avoid the formation of such a hole in the photoresist film at the four-fold exposure portion. Next, by etching the insulating film 2 using the photoresist film 3 as a mask, the contact hole 6 as shown in FIG. 2B is formed. At that time, a hole 7 results in being formed at the four-fold exposure portion. Thereafter, a conductive film, such as an Al-Si-Cu alloy film 8, is formed and also a photoresist film 9 for the formation of interconnect layers is formed. The photoresist film 9 is not formed on the scribe region II, and this is for avoiding the scattering of conductive matter when the divisions are made by the scribing. Next, by using the photoresist film 9 as a mask, the Al-Si-Cu alloy film 8 is patterned and the interconnect layer 8a is formed. At that time, the residue 10 of Al-Si-Cu tends to be present at sidewalls of the hole 7.
The problems in the prior art, therefore, are that, as explained above, when the contact hole is formed in the insulating film on a wafer by the step exposure using the half-tone phase shift mask, there is also unavoidably formed a hole at the overlap exposure portion of the scribe region, and this results in a state wherein, during the subsequent interconnect layer formation, the residue of conductive matter is present at the sidewalls of the hole. During the cleaning step, the residue peels off and becomes a cause of producing dust or contaminants which lead to the lowering of the yield and the reliability.